24MP Educate me.

What matters is what is the end result you can get. More pixels gives more information which allows NR to do a better job. If you insist on negating the advantages that it offers, of course you'll get a misleading result.

It's not the properties of the pixel that is relevant. It's the amount of information that an aggregate of pixels can yield about the scene.

It depends on what you mean by 'pixel cells'. The A9 III's pixels are the same size as any other FF 24MP sensor, but global shutter pixels contain two photodiodes, only one receptive to incident light. FWC is a somewhat anachronistic term when it comes to CMOS sensors, because the saturation charge isn't determined by the capacity of the potential well in the way that it was with CCDs. Instead it's determined by the voltage swing of the pixel's read transistor and the capacitance of one node in the pixel circuit (which isn't the photodiode but the floating diffusion which connects that transistor). If you're jamming more into the pixel that node tends to be smaller, has lower capacitance and saturation charge capacity reduces.

I wouldn't assume that you know more than you do. I have a Physics degree and an engineering PhD, so I have some background in this stuff. I'm not confusing capacity and capacitance. 'FWC' refers to the charge capacity of the potential well. In a CCD the potential well that keeps electrons in place in a pixel is imposed by a potential on a transparent electrode over the cell. By changing that potential the charge can be shifted along the device for read-out. The depth (in terms of electrical, not gravitational potential) of the well is determined by the potential (voltage) on that electrode and the size of the well. As more charge (electrons) fills the well, it changes the potential in the well until it equals that on the electrode and further electrons can no longer be contained. In a CMOS sensor the individual cells are insulated from each other, so they can, in theory hold any amount of electrons (at least, until the insulation breaks down). What limits the capacity is the ability to read them, which in the end is dictated by the voltage swing of the source follower transistor that performs the read out anlogf with teh conversion gain, which is determined by the capacitance of the floating diffusion. I learned this originally from Eric Fossum, so in the end you're choosing to disagree with someone who can undeniably claim to know how CMOS image sensors work.

One may use very different terms and definitions, but IMO this all this boils down to simple equation: voltage = charge / capacitance. In given sensor implementation (measurable) voltage (limit) and (cell) capacitance are fixed and this gives maximal measurable charge, which can be expressed in electrons count or 'capacity'.

I know. But that doesn't mean that it's correct.

Bill's actually saying that he's using a particular definition of FWC (as 'the limits of the ADC'). Bill's quite a one for his own definitions. I don't think anyone in the sensor business would use that definition. It tends to be used more by amateurs in the sensor analysis field (which includes me, by the way). In the old days, when sensors and ADCs were separate units the 'FWC' was a sensor parameter, independent of the ADC.
Still, it doesn't help your case, because Bill is saying even less that FWC is dependent on pixel size, instead it's an ADC characteristic. The case is that mostly (but not invariably) sensors for photography are run well short of FWC by either the charge overflow or the voltage swing definition, because the response becomes non-linear as that limit is approached. Generally the gain between the sensor output and the ADC is set so that the ADC tops out well before pixel saturation. Even extended low ISOs tend not to go into that non-linear territory.

In fact the voltage isn't very significant, because you (as in the outside observer, obviously the designers know) don't know either what is the pixel output voltage or the full-scale voltage for the ADC. In the end we can lump this together in a metric of electrons per DN (which amateur sensor measurers tend to call somewhat misleadingly the 'gain'. Given that you do know the full-scale DN from that you can work out the maximum measurable electron count per pixel. Often that's called the 'full well capacity', but that is, as I said, a misnomer.

I don't think there's such a thing as 'pro sensor measurers'.
You're missing the point really. I wasn't criticising you for using the wrong term - that's why in my original post I said the term 'FWC' was somewhat anchronistic, not wrong. Simply, it's not the measurement that matters so much with modern cameras. Further its use leads to some misunderstandings of where the limits are. Also, the fact that people like Bill Claff and others use the term loosely to mean different things leads to equivocation errors. Let me try and explain the situation.
Here is a diagram

Here PD is the photodiode, TG is the transfer gate, FD is the floating diffusion connecting TG with the source-follower amplifier SF. Remember that source followers have a voltage gain of unity or a little less, so the input of FD is limited by the voltage swing of the output. What determines the size of the input? As PD collects charge Q it will gain a potential Vpd of Q/Cpd where Cpd is the capacitance of the photodiode. The photodiode itself is generally isolated by trench oxide, so the only thing limiting Vpd is the breakdown drain-source voltage of TG. When TG is opened (made conductive) the charge flows into FD, causing a potential of Q/Cpdfd where Cpdfd is the parallel capacitance of PD and FD. Now this voltage cannot be larger than the output swing of SF, as discussed above. Also, to ensure that most of the charge transfers to FD, and therefore is used, PD must have a much lower capacitance than FD. Thus it is the capacitance of FD and the output swing of SF that determines the maximum usable charge. In many modern sensors there is a further capacitor which can be switched in parallel with FD, thus lowering the potential for a given charge and allowing more charge to be used - sometimes (wrongly) called 'dual base ISO'. This feature is an indication that it is not the 'well' that dictates the size of usable charge - rather it is the capacitance of FD and the voltage swing of SF.

This diagram shows the circuit of a global shutter pixel:

Here a second photodiode SD has been included, though it doesn't act as a photdiode because it is protected from light by a mask. It's there to save the charge from PD between the time the exposure ends and the time that the pixel can be read. At the end of the exposure the gate SG opens to allow the charge from PD to transfer to SD, then close. Then the pixel operates as the standard pixel above. So what limits the performance compared with a standard pixel. One factor is the degree to which complete charge transfer can be effected between PD and SD. This is in effect a very small CCD, so can be made quite efficient - though limited by the gate voltages on CMOS sensors being much smaller than on CCDs. The second limitation is how much capacitance there is in FD, given that the pixel has more to fit in the same space. If the capacitance is smaller, the maximum charge usable is smaller. However the pixel is still collecting light from the same area (assuming good microlenses) so can tolerate a lower maximum exposure, which means that a higher ISO must be used.

Phil Askey banned me for that! 😀